1. Field of the Invention
The present invention relates to a digital correlation threshold circuit for providing an efficient means of achieving digital correlation with thresholding to a bit sequence of length up to N.multidot.M using N M-bit correlators.
2. Description of the Prior Art
Commonly available digital correlator integrated circuits (ICs) provide for the correlation of bit sequences of up to a length M (typically 32 to 64). The correlation output of such a device is from 0 to M and consists of (log.sub.2 M+1) bits. This output is generally compared to a preset threshold by (log.sub.2 M+1)-bit circuitry usually provided on an IC device. It is often necessary to correlate sequences of up to length N.multidot.M using N correlators where N&gt;2. This is accomplished by the serial connection of N correlator devices. The resulting correlation of up to N.multidot.M bits was previously achieved by summing the outputs of the N correlators and then applying a threshold using a (log.sub.2 (N.multidot.M)+1)-bit comparator. This involves a multitude of adders and a comparator that results in considerable propagation delay and tends to produce spurious outputs.